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PiPins / logic_analyser.txt
root on 16 Mar 2020 1 KB Initial Commit
  1. - Logic Analyzer - PulseView -
  2.  
  3. The serial connection is available on the PC (running Linux) as /dev/ttyUSB0. The sniffer is started using sigrok-cli, and the resulting sigrok session data is opened with PulseView.
  4.  
  5. Command given on PC:
  6.  
  7. sigrok-cli --driver=ols:conn=/dev/ttyUSB0 --config samplerate=3000000 --samples 100000 --probes 1=CLK,2=DIN,3=DC,4=nCS,5=nRST --triggers nCS=1 -o test.sr
  8. --driver: The sniffer identifies itself as a Open Bench Logic Sniffer (OLS) on port /dev/ttyUSB0
  9. --config samplerate: using the maximum of 3M samples/s
  10. --samples: 100000 samples (taking ~33ms at 3 MHz)
  11. --probes: probe 1-5 are used, the labels are optional
  12. --triggers: the sampling starts after probe 4 (nCS, inverted chip select) turns high
  13. -o test.sr: the session is saved to a file that can be read by PulseView
  14. The probes relate to the GPIO ports of the PI as:
  15. SUMP probe 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
  16. Rev 1 GPIO 7 8 11 9 25 10 24 23 22 21 18 17 17 17 17 17
  17. Rev 2 GPIO 7 8 11 9 25 10 24 23 22 27 18 17 28 29 30 31
  18. This gives 12 probes on the rev1 board, 16 probes on rev 2 (if using the P5 header).
  19. The I2C and GPIO clock pins are reserved for future use.
  20.  
  21. possibly better logic analyzer for the pi:
  22. https://github.com/richardghirst/Panalyzer
  23. "The basic idea is that it disables interrupts for a period, while sampling the GPIO pins once a microsecond. It then re-enables interupts and displays traces showing what the relevant GPIO pins were doing."
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